SI.No |
Title of IP/Glue Logic – Either FPGA or CPLD or ASIC Implemented |
Description |
1 |
Reed-Solomon Decoder |
Introduction in FEC (Forward Error Correction) algorithms – VHDL design and verification of Key-Equation
solver block with different algorithms (Berlekamp-Massey and Euclidean Algorithm) using composite Galois Fields
GF((2r)s) - Coding of C/C++ models for verification and debugging - Timing optimization and synthesis for XILINX
FPGA |
2 |
Design of MHL (Mobile High-Definition Link) link |
The MHL is a new mobile audio/video interface standard for directly connecting mobile phones to high-definition
televisions (HDTVs). The MHL features a single-cable with a low pin-count interface able to support up to 1080p
high-definition (HD) video and digital audio while simultaneously charging the connected device. The design
specification for the Digital part of MHL developed |
3 |
Design / Verification of digital part of custom ASIC (Mixed Signal Ultra Low Power CPU) for Mobile phones |
Development and Verification of digital periphery blocks |
4 |
Requirement specification setup for next generation automotive power–train applications |
Writing requirement specification for new module IP s (µs Bus and MPI-Multi Processor Interface)- Writing
FTS-Functional Target Specification for µs Bus and MPI interface using Framemaker-Investigation of use cases
for each requirement for automotive purpose |
5 |
Test environment / test cases for UNIPRO |
UNIPRO is a high-speed interface technology for interconnecting integrated circuits in mobile phones or comparable
products. Layer 2, (Data Link), functionality is single-hop reliability and priority based arbitration. Test
Environment and Test cases for Layer 2 was developed and implemented |
6 |
PUB (Parallel to USB Interface) |
This is a Board Level Solution, dedicated to interface parallel Printer Port and USB (1.1) device/computer.
A microcontroller was used to interface the PPC (parallel port controller) and USB Host controller (Cypress) |
7 |
Design of monitor circuit for a spectral photometer |
A board developed for sensor electronics which receives analog signal from Photodiode, the microcontroller processes
this signal and sends it into LabView program running in PC |
8 |
MOST Data Link Layer |
Coding of three blocks for MOST Data Link Layer in SystemC – SystemC coding for debugging and verification
environment, verification |
9 |
Printer head data controller for Dot matrix printer |
A CPLD was implemented for controlling 9 Wire Printer Head Data and CR Motor. By placing this CPLD in the existing
MLC board, overall performance and speed of printer was increased |
10 |
Digital Dash Board |
The purpose of this Digital Dashboard is to display Analog parameters like Speed, Distance travelled, Fuel level and
also Real time clock indicators by using Static and Dynamic LCDs |
11 |
Microcontroller with MIPS R3000 Core for Automotive purposes |
ADC Controller functional and design specification setup - ADC Controller RTL designing in Verilog -ADC FSM
(Finite State Machine) and ADC Top Level designing with Mentor Graphics HDL Designer - Scripts setup, constraining
and synthesis of ADC Controller, UART, SPI and CAN modules - Script setup and constraining for functional and SCAN
mode of operation for STA (Primetime) |